20 Years of Accelerating the Next Technology Revolution
Over the last 20 years, SEMATECH has evolved with the changing marketplace, leading the advance of semiconductors through a variety of revolutionary technologies with one constant—the collaborations enabled by SEMATECH are the most powerful forces for accelerating the next technology revolution.
With the pressure across the industry to lower R&D costs, current CMOS methods reaching their manufacturing limits, and the need to realize the promise of nanotechnology, SEMATECH is crucial—now more than ever.
SEMATECH Research
SEMATECH’s R&D spans the spectrum from today’s fabs to post-CMOS university nanoelectronics. Our constant focus on manufacturability and cost of ownership means that our work addresses the challenges of chip making in today's manufactuing environment as well as those of the future.
While the technology is cutting-edge, the strategy is simple:
- Extend current technologies to their limit
- Build infrastructure for emerging technologies
- Evaluate and narrow future options in nanoelectronics
Our Members and Partners
By working with SEMATECH, many of the world’s most innovative companies have received over $2 billion in value over the last five years. SEMATECH members have reported a return on investment of up to 5.4X on every dollar spent in dues—a great return by any measure.
But SEMATECH is more than a group of member companies. The global SEMATECH network is an influential collection of relationships with the top semiconductor suppliers, universities, government labs, industry organizations, and other consortia bring additional resources and creativity to technical challenges and setting industry direction.
Now More than Ever
The convergence of emerging disciplines driven by the move from CMOS to nanoelectronics will require new partners and new capabilities, but will produce remarkable rewards. SEMATECH will continue to lead—ensuring that the right partners work together on the right ideas to lower cost while increasing creativity, ingenuity, and profitability.
SEMATECH has long been at the center of the world’s most productive industry and our best years are still to come.
SEMATECH Timeline
1980s
- SEMATECH is incorporated with 13 charter members
- Robert Noyce is named Chief Executive Officer
- SEMATECH converts a warehouse into a class 1 clean room facility called the ATDF in just 32 weeks
- The consortium initiates its first partnerships with national laboratories, Sandia and Oak Ridge National Labs
1990s
- SEMATECH demonstrates 0.5 micron manufacturing capability
- SEMATECH converts research facilities from 6-inch (150 mm) to 8-inch (200 mm) wafers
- SEMATECH demonstrates a 0.35 micron process flow on 200 mm wafers
- The first edition of the National Technology Roadmap for Semiconductors is published
- The International 300 mm Initiative (I300I) is incorporated as a subsidiary
- SEMATECH’s ATDF produces its first 300 mm wafer
- SEMATECH produces its first copper metalized wafers and the first integration of low-k dielectric with copper
2000s
- Tokyo Electron becomes SEMATECH’s first “supplier room” tenant
- SEMATECH and The University at Albany-SUNY announce $320M strategic alliance to develop tool infrastructure for extreme ultraviolet (EUV) lithography
- SEMATECH launches a new, wholly owned consortium—the International SEMATECH Manufacturing Initiative (ISMI)—to help semiconductor manufacturers increase productivity and lower costs
- The State of Texas and SEMATECH announce the formation of the Advanced Materials Research Center (AMRC) with the University of Texas System and other Texas universities to investigate emerging semiconductor technologies
- SEMATECH launches ATDF as a for-profit research facility, expanding global access to advanced processes, tools, and emerging technology development
- SEMATECH accelerates industry progress in 193 nm immersion lithography and investigates its extendibility with pioneering work on high-index fluids, resists, and lens materials
- SEMATECH evaluates ultra low-k materials and demonstrates the feasibility of CVD dielectric integration (keff=2.5) for the 45 nm technology generation
- SEMATECH achieves twin breakthroughs in channel mobility and reliability of high-k/metal gate transistors in preparation for 45 nm half pitch
- ISMI identifies nearly $500 million in potential energy savings for fabs
- SEMATECH identifies materials suitable for reliable nMOS and pMOS transistors with high-k dielectric
- SEMATECH develops a breakthrough cleaning regimen to detect and clean particles as small as 10 nm from mask blanks used for extreme ultraviolet (EUV) lithography


